The invention relates generally to computer systems having multiple processor units, and deals more particularly with a manner of communicating between the multiple processor units.
A computer system was previously known which included multiple processors units. Each of the processor units is connected to a respective gate circuit, and each gate circuit is connected to a common switch unit and a common connection bus. A common control unit is interposed between the bus and the common switch unit to control the switch. The gate circuit comprises known circuits for transferring information. The switch unit may be in the form of known network switches or matrix switches. The connection bus comprises a number of parallel lines in known manner.
To transfer data information from a first processor unit to a second processor unit, it is firstly essential that the first processor unit sends control information with the aid of which the connection between the first and the second processor unit is produced. For this purpose the first processor unit sends the control information via the respective gate circuit and the connection bus to the control unit, which produces the required connection in the switch unit between the first and second processor units. The data information to be transmitted is then sent from the first processor unit via the switch unit to the second processor unit avoiding the connection bus. This is efficient for communication between any two ot he processor units.
However, it is frequently necessary to transfer data information from a first processor unit to all other processor units. For this purpose the switch unit of the prior art computer system must be able to simultaneously connect the first processor unit to all other processor units which necessitates great outlay in terms of circuitry as well as the program.
The object of the present invention is to provide an interprocessor communication coupler which is simpler than the prior art for coupling communication between one processor and another processor and between one processor and two or more other processors.